Japanese Patent Application Laid-Open Publication No. 2001-116796 (Patent Document 1 (corresponding European Patent Publication EP 1074844)) has disclosed an IC device, a method and a device for testing solder balls on a wafer, in which the solder balls in an IC array are reshaped so that all the contact surfaces of the solder balls in the IC array are in one plane, and a uniform offset is provided between the contact surfaces of the solder balls and an IC substrate, thereby significantly reducing pressure required for contacting all solder bumps in the IC array to a testing array.
Further, Japanese Patent Application Laid-Open Publication No. 5-283490 (Patent Document 2) has disclosed a technology. According to the technology, when an integrated circuit device is electrically connected to a test measurement device by contacting the contact terminals of needles in probing means to the bump electrodes of each integrated circuit device formed in a semiconductor wafer, bump electrodes of the adjacent semiconductor integrated circuit device in the wafer are pressed by a pressing member to deform the tip portions thereof, thereby equalizing the heights of the bump electrodes. By this means, since the semiconductor integrated circuit device having bump electrodes with uniform height can be connected to the test measurement device at a uniform contact resistance through the probing means, the measurement accuracy can be improved, and the variation in contact resistance between the bump electrodes and the mounting side of the integrated circuit device when the integrated circuit device is mounted can be also reduced.
Further, Japanese Patent Application Laid-Open Publication No. 2001-60758 (Patent Document 3 (corresponding to United States Patent Publication No. 6,391,686) has disclosed a technology. According to the technology, adhesive materials are provided on a wiring substrate comprising a base substrate having a plurality of first regions to be punched out and a plurality of second regions between the first regions and wiring patterns formed at least in the above-described first regions of the base substrate, and parts of the adhesive materials provided in the above-described first regions are pressed and made to flow into the above-described second regions. By this means, the bubbles formed at the corners among the base substrate, the wiring substrate, and the wiring pattern in the first regions are moved to the second regions, and the adhesive materials are crimped to the wiring substrate, thereby removing the bubbles from the first regions.
Further, Japanese Patent Application Laid-Open Publication No. 10-300783 (Patent Document 4) has disclosed a contact probe in which a plurality of pattern wirings are formed on a film, and each of the tips of the pattern wirings protrudes from the film to be a contact pin. In this contact probe, power supply line layers including the predetermined plurality of power supply lines are laminated on the film surface on the side where the pattern wirings are formed, and each of the power supply lines is connected to the predetermined pattern wiring so that the power supply line layers are three-dimensionally provided for the pattern wirings. By this means, since the design flexibility of the wide power supply lines through which large current can flow can be improved and the heat in the power supply lines can be efficiently diffused, it is possible to prevent the breakage of the wirings.
Further, Japanese Patent Application Laid-Open Publication No. 2001-319953 (Patent Document 5) has disclosed a technology. According to the technology, in a prober having a structure in which a wafer chuck mechanism is provided with a heat plate, a probe card is placed on a card retainer, and the card retainer is fixed to a head plate, by providing a heater and a temperature sensor to the card retainer and heating the card retainer to a predetermined temperature, the temperature of the card retainer is kept constant without being influenced by the heat of the chuck mechanism. By this means, the fluctuation of a position of a probe pin due to the deformation of the card retainer caused by the temperature change can be prevented.
Further, Japanese Patent Application Laid-Open Publication No. 2000-138268 (Patent Document 6) has disclosed a technology. According to the technology, instead of the inspection which is performed by contacting a probe provided on a probe card while heating a semiconductor circuit formed on the surface of the wafer from a rear surface of the wafer, the inspection is performed while heating the surface of the probe card which is not in contact with the wafer. By this means, the amount of thermal deformation of the probe card is reduced and the accuracy of probing tests is improved.